|
| |
Load Access Rights Byte
|
86/88 |
N |
186 |
N |
286 |
Y |
386 |
Y |
486 |
Y |
LAR destination, source |
|
Ovfl |
N |
Dir |
N |
Int |
N |
Trap |
N |
Sign |
N |
Zero |
Y |
Aux |
N |
Prty |
N |
Carry |
N |
The high byte of the of the destination register is overwritten by
the value of the access rights byte and the low order byte is zeroed
depending on the selection in the source operand. The Zero Flag is
set if the load operation is successful.
------------------------------------ Timing ----------------------------------
OpCode Instruction 386 286 86
0F 02/r LAR r16,r/m16 15/16 14/16
0F 02/r LAR r32,r/m32 15/16
------------------------------------ Logic -----------------------------------
ZF = Validity
See Also ARPL CLTS LFS LGS LSS LGDT LMSW LSL LTR VERR Flags |